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Disambiguation of "Kinoshita, Kozo"

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Synthesis for Testability by Sequential Redundancy Removal Using Retiming.

, , and . FTCS, page 33-40. IEEE Computer Society, (1995)

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Other publications of authors with the same name

Realization of Minimum Circuits with Two-Input Conservative Logic Elements., and . IEEE Trans. Computers, 27 (8): 749-752 (1978)Cascade Realization of 3-Input 3-Output Conservative Logic Circuits., and . IEEE Trans. Computers, 27 (3): 214-221 (1978)Procedure to Overcome the Byzantine General's Problem for Bridging Faults in CMOS Circuits., , and . Asian Test Symposium, page 121-126. IEEE Computer Society, (1999)IDDQ Current Dependency on Test Vectors and Bridging Resistance., , and . Asian Test Symposium, page 158-163. IEEE Computer Society, (1999)A BIST Circuit for IDDQ Tests., , , , , and . Asian Test Symposium, page 390-395. IEEE Computer Society, (2003)A high-speed IDDQ sensor implementation., , , and . Asian Test Symposium, page 356-361. IEEE Computer Society, (2000)An Algorithmic Test Generation Method for Crosstalk Faults in Synchronous Sequential Circuits., , and . Asian Test Symposium, page 22-. IEEE Computer Society, (1997)Partially Parallel Scan Chain for Test Length Reduction by Using Retiming Technique., , and . Asian Test Symposium, page 94-99. IEEE Computer Society, (1996)Removal of Redundancy in Logic Circuits under Classification of Undetectable Faults., , and . FTCS, page 263-270. IEEE Computer Society, (1992)Low-capture-power test generation for scan-based at-speed testing., , , , , , and . ITC, page 10. IEEE Computer Society, (2005)