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Smilodon: An Efficient Accelerator for Low Bit-Width CNNs with Task Partitioning.

, , , , , , and . ISCAS, page 1-5. IEEE, (2019)

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Efficient Decoder Architecture for Single Block-Row Quasi-Cyclic LDPC Codes., , and . IEEE Trans. on Circuits and Systems, 61-II (10): 793-797 (2014)Flexible LDPC Decoder Design for Multigigabit-per-Second Applications., , , , and . IEEE Trans. on Circuits and Systems, 57-I (1): 116-124 (2010)A General Construction and Encoder Implementation of Polar Codes., , , , and . CoRR, (2019)Modeling the acceleration sensitive neurons in the pigeon optokinetic system., , and . Biological Cybernetics, 92 (4): 252-260 (2005)Efficient SOR Based Massive MIMO Detection Using Chebyshev Acceleration., , , , and . DSL, page 1-5. IEEE, (2018)Design space exploration for hardware-efficient stochastic computing: A case study on discrete cosine transformation., , and . ICASSP, page 6555-6559. IEEE, (2016)Materialized View Evolution Support in Data Warehouse Environment., and . DASFAA, page 247-254. IEEE Computer Society, (1999)High-throughput GCM VLSI Architecture for IEEE 802.1ae Applications., , , and . ISCAS, page 900-903. IEEE, (2009)An Adjustable Hybrid SC-BP Polar Decoder., , , , , and . APCCAS, page 211-214. IEEE, (2018)Successive Cancellation Heap Polar Decoding., , , , and . GLOBECOM, page 1-6. IEEE, (2016)