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Hardware-Accelerated Collision Detection using Bounded-Error Fixed-Point Arithmetic.

, , , and . Journal of WSCG, 14 (1-3): 17-24 (2006)

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Space-efficient FPGA-accelerated collision detection for virtual prototyping., , , and . DATE Designers' Forum, page 206-211. European Design and Automation Association, Leuven, Belgium, (2006)Hardware-Accelerated Collision Detection using Bounded-Error Fixed-Point Arithmetic., , , and . Journal of WSCG, 14 (1-3): 17-24 (2006)