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Disambiguation of "Kitsos, Paris"

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A Comparison of TERO and RO Timing Sensitivity for Hardware Trojan Detection Applications.

, and . DSD, page 547-550. IEEE Computer Society, (2015)

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Other publications of authors with the same name

Low Power FPGA Implementations of JH and Fugue Hash Functions., , and . DSD, page 417-421. IEEE Computer Society, (2011)Hardware implementation of the SAFER+ encryption algorithm for the Bluetooth system., , and . ISCAS (4), page 878-881. IEEE, (2002)A comparative study of hardware architectures for lightweight block ciphers., , , and . Computers & Electrical Engineering, 38 (1): 148-160 (2012)A 4-bit Architecture of SEED Block Cipher for IoT Applications., , and . ICECS, page 389-392. IEEE, (2018)A Hybrid FPGA Trojan Detection Technique Based-on Combinatorial Testing and On-chip Sensing., and . ARC, volume 10824 of Lecture Notes in Computer Science, page 294-303. Springer, (2018)FPGA Trojan Detection Using Length-Optimized Ring Oscillators., and . DSD, page 675-678. IEEE Computer Society, (2014)Architectural Optimizations & Hardware Implementations of WLANs Encryption Standard., and . NTMS, page 1-5. IEEE, (2012)On the hardware implementation efficiency of SHA-3 candidates., and . ICECS, page 1240-1243. IEEE, (2010)Configurable Hardware Implementations of Bulk Encryption Units for Wireless Communications., and . Int. Arab J. Inf. Technol., (2004)Comparing design approaches for elliptic curve point multiplication over GF(2k) with polynomial basis representation., , , and . Microprocessors and Microsystems - Embedded Hardware Design, 39 (8): 1139-1155 (2015)