Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Emulating Mammalian Vision on Reconfigurable Hardware.

S. Kestur, M. Park, J. Sabarad, D. Dantara, V. Narayanan, Y. Chen, and D. Khosla. FCCM, page 141-148. IEEE Computer Society, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Kestur, Srinidhi

add a person with the name Kestur, Srinidhi

Other publications of authors with the same name

SHARC: A streaming model for FPGA accelerators and its application to Saliency.S. Kestur, D. Dantara, and V. Narayanan. DATE, page 1237-1242. IEEE, (2011)Invited paper: Accelerating neuromorphic vision on FPGAs.S. Park, S. Kestur, K. Irick, and V. Narayanan. CVPR Workshops, page 103-108. IEEE Computer Society, (2011)Emulating Mammalian Vision on Reconfigurable Hardware.S. Kestur, M. Park, J. Sabarad, D. Dantara, V. Narayanan, Y. Chen, and D. Khosla. FCCM, page 141-148. IEEE Computer Society, (2012)FPGA architecture for 2D Discrete Fourier Transform based on 2D decomposition for large-sized data.J. Kim, C. Yu, L. Deng, S. Kestur, V. Narayanan, and C. Chakrabarti. SiPS, page 121-126. IEEE, (2009)Accelerators for biologically-inspired attention and recognition.M. Park, C. Zhang, M. DeBole, and S. Kestur. DAC, page 135:1-135:6. ACM, (2013)An FPGA-based accelerator for cortical object classification.M. Park, S. Kestur, J. Sabarad, V. Narayanan, and M. Irwin. DATE, page 691-696. IEEE, (2012)FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data.C. Yu, J. Kim, L. Deng, S. Kestur, V. Narayanan, and C. Chakrabarti. Signal Processing Systems, 64 (1): 109-122 (2011)Accelerating the Nonuniform Fast Fourier Transform Using FPGAs.S. Kestur, S. Park, K. Irick, and V. Narayanan. FCCM, page 19-26. IEEE Computer Society, (2010)Towards a Universal FPGA Matrix-Vector Multiplication Architecture.S. Kestur, J. Davis, and E. Chung. FCCM, page 9-16. IEEE Computer Society, (2012)A reconfigurable accelerator for neuromorphic object recognition.J. Sabarad, S. Kestur, M. Park, D. Dantara, V. Narayanan, Y. Chen, and D. Khosla. ASP-DAC, page 813-818. IEEE, (2012)

PUMA

Disambiguation of "Kestur, Srinidhi"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Emulating Mammalian Vision on Reconfigurable Hardware.

Please choose a person to relate this publication to

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Kestur, Srinidhi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Emulating Mammalian Vision on Reconfigurable Hardware.

Please choose a person to relate this publication to

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Emulating Mammalian Vision on Reconfigurable Hardware.