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Disambiguation of "Chiang, Patrick"

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A 41-mW 30-Gb/s CMOS optical receiver with digitally-tunable cascaded equalization.

, , , , , , , and . ESSCIRC, page 127-130. IEEE, (2014)

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Patrick Gralka University of Stuttgart

Patrick Maisenhölder University of Stuttgart

Patrick Lerge University of Stuttgart

Patrick Hippold University of Stuttgart

Patrick Mesmer University of Stuttgart

 

Other publications of authors with the same name

A 10Gb/s Wire-line Transceiver with Half Rate Period Calibration CDR., , , , and . ISCAS, page 1827-1830. IEEE, (2009)SWIFT: A SWing-reduced interconnect for a Token-based Network-on-Chip in 90nm CMOS., , , , and . ICCD, page 439-446. IEEE Computer Society, (2010)Silicon Photonic Transceiver Circuits With Microring Resonator Bias-Based Wavelength Stabilization in 65 nm CMOS., , , , , , , , , and 3 other author(s). J. Solid-State Circuits, 49 (6): 1419-1436 (2014)0.56 V, -20 dBm RF-Powered, Multi-Node Wireless Body Area Network System-on-a-Chip With Harvesting-Efficiency Tracking Loop., , , and . J. Solid-State Circuits, 49 (6): 1345-1355 (2014)Platform IO and system memory test using L3 cache based test (CBT) and parallel execution of CPGC Intel BIST engine., , , , , , and . ITC, page 1-10. IEEE, (2015)A reusable BIST with software assisted repair technology for improved memory and IO debug, validation and test time., , , , , , , , and . ITC, page 1-10. IEEE Computer Society, (2014)Energy-efficient bio-sensing systems., and . CICC, page 1. IEEE, (2014)SWIFT: A Low-Power Network-On-Chip Implementing the Token Flow Control Router Architecture With Swing-Reduced Interconnects., , , , and . IEEE Trans. VLSI Syst., 21 (8): 1432-1446 (2013)Sinusoidal Clock Sampling for Multigigahertz ADCs., , , , , , and . IEEE Trans. on Circuits and Systems, 58-I (12): 2808-2815 (2011)Synctium: a Near-Threshold Stream Processor for Energy-Constrained Parallel Applications., , , and . IEEE Comput. Archit. Lett., 9 (1): 21-24 (2010)