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A Parallel Simulated Annealing Approach for Floorplanning in VLSI.

J. Fang, Y. Chang, C. Chen, W. Liang, T. Hsieh, M. Satria, and C. Han. ICA3PP, volume 5574 of Lecture Notes in Computer Science, page 291-302. Springer, (2009)

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Other publications of authors with the same name

A Parallel Computing Technique for Complete Modular Eigenspace Feature Extraction of Hyperspectral Images.Y. Chang, J. Fang, J. Huang, C. Lin, H. Ren, and W. Liang. IGARSS, page 960-963. IEEE, (2006)A Simulated Annealing Feature Extraction approach for hyperspectral images.Y. Chang, J. Fang, J. Liu, H. Ren, and W. Liang. IGARSS, page 3190-3193. IEEE, (2007)K-way Tree Classification based on Semi-greedy Structure applied to Multisource Remote Sensing Images.Y. Chang, Z. Chen, J. Fang, W. Hsu, W. Liang, T. Hsieh, H. Ren, and K. Chen. IGARSS (3), page 979-982. IEEE, (2009)Band selection for hyperspectral images based on impurity function.Y. Chang, B. Shu, T. Hsieh, C. Chu, and J. Fang. IGARSS, page 2369-2372. IEEE, (2011)Simulation of tsunami impact on Taiwan coastal area.Y. Chang, M. Huang, Y. Wang, W. Lin, J. Fang, B. Huang, and T. Hsieh. IGARSS, page 3702-3705. IEEE, (2013)Memory-Aware Dynamic Voltage and Frequency Prediction for Portable Devices.W. Liang, S. Chen, Y. Chang, and J. Fang. RTCSA, page 229-236. IEEE Computer Society, (2008)A Parallel Positive Boolean Function approach to supervised multispectral image classification.Y. Chang, J. Fang, L. Chen, L. Liang, and K. Chen. IGARSS, page 1525-1528. IEEE, (2007)A Parallel Simulated Annealing Approach to Band Selection for Hyperspectral Imagery.Y. Chang, J. Fang, W. Liang, L. Chang, H. Ren, and K. Chen. IGARSS (2), page 994-997. IEEE, (2008)Band Selection for Hyperspectral Images based on Parallel Particle Swarm Optimization Schemes.Y. Chang, J. Fang, J. Benediktsson, L. Chang, H. Ren, and K. Chen. IGARSS (5), page 84-87. IEEE, (2009)An Enhanced BSA for Floorplanning.J. Fang, Y. Tong, and S. Chen. IEICE Transactions, 89-A (2): 528-534 (2006)

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A Parallel Simulated Annealing Approach for Floorplanning in VLSI.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Parallel Simulated Annealing Approach for Floorplanning in VLSI.

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A Parallel Simulated Annealing Approach for Floorplanning in VLSI.