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Disambiguation of "Rogers, Brian"

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Processor architecture for software implementation of multi-sector G-RAKE receivers for HSUPA wireless infrastructure.

, , , , , and . ICASSP, page 2770-2774. IEEE, (2013)

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Brian Setz University of Stuttgart

Dr. Brian Kagay University of Stuttgart

Brian Carlsen University of Stuttgart

 

Other publications of authors with the same name

Memory predecryption: hiding the latency overhead of memory encryption., , and . SIGARCH Computer Architecture News, 33 (1): 27-33 (2005)Processor architecture for software implementation of multi-sector G-RAKE receivers for HSUPA wireless infrastructure., , , , , and . ICASSP, page 2770-2774. IEEE, (2013)Single-level integrity and confidentiality protection for distributed shared memory multiprocessors., , , , and . HPCA, page 161-172. IEEE Computer Society, (2008)Improving Cost, Performance, and Security of Memory Encryption and Authentication., , , , and . ISCA, page 179-190. IEEE Computer Society, (2006)Making secure processors OS- and performance-friendly., , , and . TACO, 5 (4): 16:1-16:35 (2009)Tractarian First-order Logic: Identity and the n-operator., and . Rev. Symb. Log., 5 (4): 538-573 (2012)SecureME: a hardware-software approach to full system security., , , and . ICS, page 108-119. ACM, (2011)SHIELDSTRAP: Making secure processors truly secure., , and . ICCD, page 289-296. IEEE Computer Society, (2009)A comment on "Egalitarianism and efficiency in repeated symmetric games" by V. Bhaskar [Games Econ. Behav. 32(2000) 247-262]., and . Games and Economic Behavior, 74 (1): 240-242 (2012)Using Address Independent Seed Encryption and Bonsai Merkle Trees to Make Secure Processors OS- and Performance-Friendly., , , and . MICRO, page 183-196. IEEE Computer Society, (2007)