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Disambiguation of "Yun, Heechul"

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Memory Servers for Multicore Systems.

, and . RTAS, page 97-108. IEEE Computer Society, (2016)

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Other publications of authors with the same name

Integrating NVIDIA Deep Learning Accelerator (NVDLA) with RISC-V SoC on FireSim., , and . CoRR, (2019)Deterministic Memory Abstraction and Supporting Cache Architecture for Real-Time Systems., , , and . CoRR, (2017)Work-In-Progress: Protecting Real-Time GPU Applications on Integrated CPU-GPU SoC Platforms., and . RTAS, page 141-144. IEEE Computer Society, (2017)Parallelism-Aware Memory Interference Delay Analysis for COTS Multicore Systems., , and . ECRTS, page 184-195. IEEE Computer Society, (2015)Addressing isolation challenges of non-blocking caches for multicore real-time systems., , and . Real-Time Systems, 53 (5): 673-708 (2017)Taming Non-Blocking Caches to Improve Isolation in Multicore Real-Time Systems., , and . RTAS, page 161-172. IEEE Computer Society, (2016)Deterministic Memory Abstraction and Supporting Multicore System Architecture., , , and . ECRTS, volume 106 of LIPIcs, page 1:1-1:25. Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, (2018)System-wide energy optimization for multiple DVS components and real-time tasks., , , , , and . Real-Time Systems, 47 (5): 489-515 (2011)Impact of DM-LRU on WCET: A Static Analysis Approach., , and . ECRTS, volume 133 of LIPIcs, page 17:1-17:25. Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, (2019)A framework for the safe interoperability of medical devices in the presence of network failures., , , , , and . ICCPS, page 149-158. ACM, (2010)