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Disambiguation of "Fick, Laura"

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Low-Power and Compact Analog-to-Digital Converter Using Spintronic Racetrack Memory Devices.

, , , , , and . IEEE Trans. VLSI Syst., 25 (3): 907-918 (2017)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Laura Kleckner University of Stuttgart

Laura Schmidberger University of Stuttgart

Laura Elflein University of Stuttgart

Laura Bareiß University of Stuttgart

Laura Balange University of Stuttgart

 

Other publications of authors with the same name

A 346 µm 2 VCO-Based, Reference-Free, Self-Timed Sensor Interface for Cubic-Millimeter Sensor Nodes in 28 nm CMOS., , , , and . J. Solid-State Circuits, 49 (11): 2462-2473 (2014)Rectified-linear and recurrent neural networks built with spin devices., , , , and . ISCAS, page 1-4. IEEE, (2017)Low-Power and Compact Analog-to-Digital Converter Using Spintronic Racetrack Memory Devices., , , , , and . IEEE Trans. VLSI Syst., 25 (3): 907-918 (2017)Analog in-memory subthreshold deep neural network accelerator., , , , , and . CICC, page 1-4. IEEE, (2017)Racetrack converter: A low power and compact data converter using racetrack spintronic devices., , , , , and . ISCAS, page 585-588. IEEE, (2015)24.3 A 36.8 2b-TOPS/W self-calibrating GPS accelerator implemented using analog calculation in 65nm LP CMOS., , , , , , , and . ISSCC, page 420-422. IEEE, (2016)14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence., , , , , , , , , and 4 other author(s). ISSCC, page 250-251. IEEE, (2017)Introduction to Compute-in-Memory., and . CICC, page 1-65. IEEE, (2019)