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Partition vs. Comparison Side-Channel Distinguishers: An Empirical Evaluation of Statistical Tests for Univariate Side-Channel Attacks against Two Unprotected CMOS Devices.

, , and . ICISC, volume 5461 of Lecture Notes in Computer Science, page 253-267. Springer, (2008)

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Domain Specific Tools and Methods for Application in Security Processor Design., and . Design Autom. for Emb. Sys., 7 (4): 365-383 (2002)Lightweight Prediction-Based Tests for On-Line Min-Entropy Estimation., , , and . Embedded Systems Letters, 9 (2): 45-48 (2017)Design of an Interconnect Architecture and Signaling Technology for Parallelism in Communication., , and . IEEE Trans. VLSI Syst., 15 (8): 881-894 (2007)Machine learning in side-channel analysis: a first study., , , , and . J. Cryptographic Engineering, 1 (4): 293-302 (2011)Fair and Consistent Hardware Evaluation of Fourteen Round Two SHA-3 Candidates., , , , , , , , , and 4 other author(s). IEEE Trans. VLSI Syst., 20 (5): 827-840 (2012)Decryption Failure Attacks on IND-CCA Secure Lattice-Based Schemes., , , , , and . Public Key Cryptography (2), volume 11443 of Lecture Notes in Computer Science, page 565-598. Springer, (2019)Security Considerations in the Design and Implementation of a new DES chip., , , and . EUROCRYPT, volume 304 of Lecture Notes in Computer Science, page 287-300. Springer, (1987)The communication and computation cost of wireless security: extended abstract., , , and . WISEC, page 1-4. ACM, (2011)Iteration Bound Analysis and Throughput Optimum Architecture of SHA-256 (384, 512) for Hardware Implementations., , and . WISA, volume 4867 of Lecture Notes in Computer Science, page 102-114. Springer, (2007)Teaching HW/SW codesign with a Zynq ARM/FPGA SoC., , , , , and . EWME, page 63-66. IEEE, (2018)