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Pseudo-LFSR PUF: A Compact, Efficient and Reliable Physical Unclonable Function.

, , , and . ReConFig, page 223-228. IEEE Computer Society, (2011)

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Pseudo-LFSR PUF: A Compact, Efficient and Reliable Physical Unclonable Function., , , and . ReConFig, page 223-228. IEEE Computer Society, (2011)Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption., , , , and . IEICE Transactions, 96-D (11): 2333-2343 (2013)A Fast Power Current Simulation of Cryptographic VLSI Circuits for Side Channel Attack Evaluation., , , , , and . IEICE Transactions, 96-A (12): 2533-2541 (2013)Development of an Evaluation Platform and Performance Experimentation of Flex Power FPGA Device., , , and . IEICE Transactions, 101-D (2): 303-313 (2018)Enhanced Correlation Power Analysis Using Key Screening Technique., , , , and . ReConFig, page 403-408. IEEE Computer Society, (2008)FPGA-Based Intrusion Detection System for 10 Gigabit Ethernet., , , and . IEICE Transactions, 90-D (12): 1923-1931 (2007)Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage., , , , , , , , , and 4 other author(s). IEICE Transactions, 97-C (4): 272-279 (2014)A fast power current analysis methodology using capacitor charging model for side channel attack evaluation., , , , , and . HOST, page 87-92. IEEE Computer Society, (2011)Energy and area saving effect of Dynamic Partial Reconfiguration on a 28-nm process FPGA., , and . GCCE, page 217-218. IEEE, (2013)Circuit Simulation for Fault Sensitivity Analysis and Its Application to Cryptographic LSI., , and . FDTC, page 16-23. IEEE Computer Society, (2012)