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Disambiguation of "Hylla, Kai"

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An ESL timing & power estimation and simulation framework for heterogeneous socs.

, , , , , , , , , and . ICSAMOS, page 181-190. IEEE, (2014)

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Univ. -Prof. Dr. -Ing. Kai Hufendiek University of Stuttgart

Kai Waldner University of Stuttgart

Dr. Florian Kaiser University of Stuttgart

Manuel Kaiser University of Stuttgart

Robin Kaißner University of Stuttgart

 

Other publications of authors with the same name

An Advanced Simulink Verification Flow Using SystemC., , and . FDL (Selected Papers), volume 36 of Lecture Notes in Electrical Engineering, page 71-84. (2008)The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration., , , , , , , , , and 4 other author(s). Microprocessors and Microsystems - Embedded Hardware Design, 37 (8-C): 966-980 (2013)Early Power & Timing Estimation of Custom Hardware Blocks based on Automatically Generated Combinatorial Macros., , , and . MBMV, page 147-158. Institut für Angewandte Mikroelektronik und Datentechnik, Fakultät für Informatik und Elektrotechnik, Universität Rostock, (2013)Hybrid logical-statistical simulation with thermal and IR-drop mapping for degradation and variation prediction., , and . ISLPED, page 33-38. ACM, (2009)Bridging the gap between precise RT-level power/timing estimation and fast high-level simulation: a method for automatically identifying and characterising combinational macros in synchronous sequential systems at register-transfer level and subsequent executable high-level model generation with respect to non-functional properties.. Carl von Ossietzky University of Oldenburg, (2014)COMPLEX: COdesign and Power Management in PLatform-Based Design Space EXploration., , , , , , , , , and 4 other author(s). DSD, page 349-358. IEEE Computer Society, (2012)Using SystemC for an Extended MATLAB/Simulink Verification Flow., , and . FDL, page 221-226. IEEE, (2008)Towards an ESL Framework for Timing and Power Aware Rapid Prototyping of HW/SW Systems., , , and . FDL, page 56-61. ECSI, Electronic Chips & Systems design Initiative, (2010)An ESL timing & power estimation and simulation framework for heterogeneous socs., , , , , , , , , and . ICSAMOS, page 181-190. IEEE, (2014)