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A 12-bit high performance low cost pipeline ADC., , and . ICECS, page 471-474. IEEE, (2003)Design and ASIC performance analysis of a reconfigurable digital filter for a UMTS application., , , and . ISSPA (2), page 255-258. IEEE, (2003)0-7803-7946-2.Dynamic Voltage Scaling for Power Aware Fast Fourier Transform (FFT) Processor., , and . Asia-Pacific Computer Systems Architecture Conference, volume 3740 of Lecture Notes in Computer Science, page 52-64. Springer, (2005)Implementation of a reconfigurable architecture., , , , and . ICECS, page 447-450. IEEE, (2003)A proposed reconfigurable digital filter for a mobile station receiver., , and . GLOBECOM, page 524-528. IEEE, (2002)Analysis of geometric and non-linear programming as optimization algorithms for low power VLSI circuits., , , and . CCECE, page 617-620. IEEE, (2011)Noise Analysis of a Reduced Complexity Pipeline Analog-to-Digital Converter., , and . DELTA, page 360-368. IEEE Computer Society, (2004)A 2mA-2.5V Low Phase Noise Multi-standard VCO., , , and . ISCAS, page 2101-2104. IEEE, (2009)A highly efficient reconfigurable architecture for an UTRA-TDD mobile station receiver., , , , and . ISCAS (2), page 45-48. IEEE, (2003)Design and implementation of a low power MEMS based reconfigurable VCO., and . ICECS, page 1-4. IEEE, (2005)