Author of the publication

Bottlenecks in Multimedia Processing with SIMD Style Extensions and Architectural Enhancements.

, , and . IEEE Trans. Computers, 52 (8): 1015-1031 (2003)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Critical path analysis of the TRIPS architecture., , , , and . ISPASS, page 37-47. IEEE Computer Society, (2006)Implementation and Evaluation of a Dynamically Routed Processor Operand Network., , , , , , and . NOCS, page 7-17. IEEE Computer Society, (2007)A Scalable High-Bandwidth Architecture for Lossless Compression on FPGAs., , , and . FCCM, page 52-59. IEEE Computer Society, (2015)Memory Systems., , and . The Computer Science and Engineering Handbook, CRC Press, (1997)Exploiting Microarchitectural Redundancy For Defect Tolerance., , , and . ICCD, page 481-488. IEEE Computer Society, (2003)Static Energy Reduction Techniques for Microprocessor Caches., , , , and . ICCD, page 276-283. IEEE Computer Society, (2001)Dataflow Predication., , , , , , and . MICRO, page 89-102. IEEE Computer Society, (2006)Distributed Microarchitectural Protocols in the TRIPS Prototype Processor., , , , , , , , , and 7 other author(s). MICRO, page 480-491. IEEE Computer Society, (2006)Merging Head and Tail Duplication for Convergent Hyperblock Formation., , , and . MICRO, page 65-76. IEEE Computer Society, (2006)Priority-based cache allocation in throughput processors., , , , , , , and . HPCA, page 89-100. IEEE Computer Society, (2015)