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Disambiguation of "Vianello, Elisa"

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A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques.

, , , , , , , , , , , , , , , and . ISSCC, page 226-228. IEEE, (2019)

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Elisa Favaro University of Stuttgart

Elisa Werler University of Stuttgart

Elisa Seidel University of Stuttgart

Elisa Ilg University of Stuttgart

Dr. Elisa Deiss-Helbig University of Stuttgart

 

Other publications of authors with the same name

Metal Oxide Resistive Memory (OxRAM) and Phase Change Memory (PCM) as Artificial Synapses in Spiking Neural Networks., , , , , , , , , and . ICECS, page 561-564. IEEE, (2018)A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques., , , , , , , , , and 6 other author(s). ISSCC, page 226-228. IEEE, (2019)Hybrid CMOS-RRAM Neurons with Intrinsic Plasticity., , , , , , , and . ISCAS, page 1-5. IEEE, (2019)A Current Attenuator for Efficient Memristive Crossbars Read-Out., , , , , , and . ISCAS, page 1-5. IEEE, (2019)On the impact of OxRAM-based synapses variability on convolutional neural networks performance., , , , , , , , , and . NANOARCH, page 193-198. IEEE Computer Society, (2015)Back-end 3D integration of HfO2-based RRAMs for low-voltage advanced IC digital design., , , , , , , , , and 4 other author(s). ICICDT, page 235-238. IEEE, (2013)Memory-Centric Neuromorphic Computing With Nanodevices., , , , , , , , , and . BioCAS, page 1-4. IEEE, (2019)Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks., , , , , , , , , and 3 other author(s). CoRR, (2022)On the forming-free operation of HfOx based RRAM devices: Experiments and ab initio calculations., , , , , , , , , and 1 other author(s). ESSDERC, page 170-173. IEEE, (2013)Experimental Investigation of 4-kb RRAM Arrays Programming Conditions Suitable for TCAM., , , , , , , , and . IEEE Trans. VLSI Syst., 26 (12): 2599-2607 (2018)