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A full 4-channel 60 GHz direct-conversion transceiver., , , , , , , , , and . ASP-DAC, page 95-96. IEEE, (2013)A MOS Transistor-Array for Accurate Measurement of Subthreshold Leakage Variation., , , , , , and . ISQED, page 21-26. IEEE Computer Society, (2007)An ultra-compact LC-VCO using a stacked-spiral inductor., , , and . IEICE Electronic Express, 8 (7): 512-517 (2011)Physical Modeling of MEMS Variable Inductor., , and . IEEE Trans. on Circuits and Systems, 55-II (5): 419-422 (2008)Full Four-Channel 6.3-Gb/s 60-GHz CMOS Transceiver With Low-Power Analog and Digital Baseband Circuitry., , , , , , , , , and 15 other author(s). J. Solid-State Circuits, 48 (1): 46-65 (2013)A fractional-N sub-sampling PLL using a pipelined phase-interpolator with a FoM of -246dB., , , , , , , , and . ESSCIRC, page 380-383. IEEE, (2015)Jussi Ryynänen Introduction to the December Special Issue on the 2015 IEEE International Solid-State Circuits Conference., , , , and . J. Solid-State Circuits, 50 (12): 2799-2803 (2015)Two-Stage Band-Selectable CMOS Power Amplifiers Using Inter-Stage Frequency Tuning., , , and . IEICE Transactions, 95-C (2): 290-296 (2012)Type-I Digital Ring-Based PLL Using Loop Delay Compensation and ADC-Based Sampling Phase Detector., , , , and . IEICE Transactions, 102-C (7): 520-529 (2019)A Fully-Synthesizable 10.06Gbps 16.1mW Injection-Locked CDR in 28nm FDSOI., , , , , and . IEICE Transactions, 100-C (3): 259-267 (2017)