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S2-PM: semi-supervised learning for efficient performance modeling of analog and mixed signal circuits.

, , and . ASP-DAC, page 268-273. ACM, (2019)

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Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters., , , , , and . IEEE Trans. on Circuits and Systems, 66-I (4): 1342-1354 (2019)A 2.4-GHz ΔΣ Fractional-N Synthesizer with Space-Time Averaging for Noise Reduction., , , , , , , and . CICC, page 1-4. IEEE, (2019)S2-PM: semi-supervised learning for efficient performance modeling of analog and mixed signal circuits., , and . ASP-DAC, page 268-273. ACM, (2019)A Fractional-N PLL With Space-Time Averaging for Quantization Noise Reduction., , , , , , , , and . J. Solid-State Circuits, 55 (3): 602-614 (2020)A 10-bit 120-MS/s SAR ADC With Reference Ripple Cancellation Technique., , , , , , , , and . J. Solid-State Circuits, 55 (3): 680-692 (2020)A Second-Order Purely VCO-Based CT ΔΣ ADC Using a Modified DPLL Structure in 40-nm CMOS., , , , , , and . J. Solid-State Circuits, 55 (2): 356-368 (2020)A Two-Step ADC With a Continuous-Time SAR-Based First Stage., , , , , , , , , and . J. Solid-State Circuits, 54 (12): 3375-3385 (2019)Advances in Voltage-Controlled-Oscillator-Based ΔΣ ADCs., , , , , , , and . IEICE Transactions, 102-C (7): 509-519 (2019)A 10b 120MS/s SAR ADC with Reference Ripple Cancellation Technique., , , , , , and . CICC, page 1-4. IEEE, (2019)An Energy-Efficient Comparator with Dynamic Floating Inverter Pre-Amplifier., , , , , and . VLSI Circuits, page 140-. IEEE, (2019)