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Disambiguation of "Bolzani, Letícia Maria Veiras"

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Investigating the Use of BICS to detect resistive-open defects in SRAMs.

, , , , , , and . IOLTS, page 200-201. IEEE Computer Society, (2010)

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Claudia Marianowski University of Stuttgart

apl. Prof. Dr. Maria Fyta University of Stuttgart

Maria Papadimitraki University of Stuttgart

Maria Hammer University of Stuttgart

Maria Barnhart University of Stuttgart

 

Other publications of authors with the same name

Hybrid Soft Error Detection by Means of Infrastructure IP Cores., , , , and . IOLTS, page 79-88. IEEE Computer Society, (2004)Placement-aware Clustering for Integrated Clock and Power Gating., , , , and . ISCAS, page 1723-1726. IEEE, (2009)A defect-oriented test approach using on-Chip current sensors for resistive defects in FinFET SRAMs., , , , and . Microelectronics Reliability, (2018)On-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core., , , , , and . DSN, page 50-58. IEEE Computer Society, (2005)An optimized hybrid approach to provide fault detection and correction in SoCs., , and . SBCCI, page 342-347. ACM, (2007)A Hybrid Approach to Fault Detection and Correction in SoCs., , and . IOLTS, page 107-112. IEEE Computer Society, (2007)An Integrated Approach for Increasing the Soft-Error Detection Capabilities in SoCs processors., , , , and . DFT, page 445-453. IEEE Computer Society, (2005)Coupling EA and high-level metrics for the automatic generation of test blocks for peripheral cores., , , and . GECCO, page 1912-1919. ACM, (2007)Integrating Clock Gating and Power Gating for Combined Dynamic and Leakage Power Optimization in Digital CMOS Circuits., , , , and . DSD, page 298-303. IEEE Computer Society, (2008)A Hardware-Based Approach for Fault Detection in RTOS-Based Embedded Systems., , , and . European Test Symposium, page 209. IEEE Computer Society, (2011)