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Pair-Bit Errors Aware LDPC Decoding in MLC NAND Flash Memory.

, , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 38 (12): 2312-2320 (2019)

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BoundShield: Comprehensive Mitigation for Memory Disclosure Attacks via Secret Region Isolation., , , and . IEEE Access, (2018)CooECC: A Cooperative Error Correction Scheme to Reduce LDPC Decoding Latency in NAND Flash., , , , , and . ICCD, page 657-664. IEEE Computer Society, (2017)A Program Interference Error Aware LDPC Scheme for Improving NAND Flash Decoding Performance., , , , , , and . ACM Trans. Embedded Comput. Syst., 16 (5s): 141:1-141:20 (2017)A PV aware data placement scheme for read performance improvement on LDPC based flash memory: work-in-progress., , , , , , , and . CODES+ISSS, page 3:1-3:2. ACM, (2017)Boosting read-ahead efficiency for improved user experience on mobile devices., , , , , and . SIGBED Review, 16 (3): 75-80 (2019)RBER Aware Multi-Sensing for Improving Read Performance of 3D MLC NAND Flash Memory., , , , , , , and . IEEE Access, (2018)Exploiting Process Variation for Read Performance Improvement on LDPC Based Flash Memory Storage Systems., , , , , and . ICCD, page 681-684. IEEE Computer Society, (2017)Enhancing SSD performance with LDPC-aware garbage collection., , , , and . NVMSA, page 1-4. IEEE, (2017)Reducing LDPC Soft Sensing Latency by Lightweight Data Refresh for Flash Read Performance Improvement., , , , , and . DAC, page 23:1-23:6. ACM, (2017)FastGC: accelerate garbage collection via an efficient copyback-based data migration in SSDs., , , , , and . DAC, page 7:1-7:6. ACM, (2018)