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On-Chip Power Noise Reduction Techniques in High Performance SoC-Based Integrated Circuits., , , and . SoCC, page 309-312. IEEE, (2005)Impedance characteristics of decoupling capacitors in multi-power distribution systems., and . ICECS, page 160-163. IEEE, (2004)Noise Aware Decoupling Capacitors for Multi-Voltage Power Distribution Systems., and . ISQED, page 334-339. IEEE Computer Society, (2005)3D stacked power distribution considering substrate coupling., , , , , , and . ICCD, page 225-230. IEEE Computer Society, (2009)On-chip power distribution grids with multiple supply voltages for high performance integrated circuits., , , and . ACM Great Lakes Symposium on VLSI, page 2-7. ACM, (2005)On-die decoupling capacitance: frequency domain analysis of activity radius., , , and . ISCAS, IEEE, (2006)Nanoscale on-chip decoupling capacitors., and . SoCC, page 51-54. IEEE, (2008)Decoupling capacitors for multi-voltage power distribution systems., and . IEEE Trans. VLSI Syst., 14 (3): 217-228 (2006)Efficient placement of distributed on-chip decoupling capacitors in nanoscale ICs., , , and . ICCAD, page 811-816. IEEE Computer Society, (2007)Effective Radii of On-Chip Decoupling Capacitors., , , and . IEEE Trans. VLSI Syst., 16 (7): 894-907 (2008)