PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Becker, Jürgen"

Author of the publication

copydeleteadd this publication to your clipboard
Car-to-Car Communication Security on Reconfigurable Hardware.

, , , , and . VTC Spring, IEEE, (2009)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

apl. Prof. Dr. Jürgen Pleiss University of Stuttgart

Univ. -Prof. Dr. Jürgen Pafel University of Stuttgart

Dr. rer. nat. Jürgen Steinwandel University of Stuttgart

Hon. -Prof. Dr. Jürgen Hammer University of Stuttgart

Hon. -Prof. Dr. Jürgen Blum University of Stuttgart

 

Other publications of authors with the same name

A flexible approach for compiling scilab to reconfigurable multi-core embedded systems., , , , , , , , , and 11 other author(s). ReCoSoC, page 1-8. IEEE, (2012)A reconfigurable high-speed spiral FIR filter architecture., , and . TSP, page 532-537. IEEE, (2017)A FPGA based fast runtime reconfigurable real-time Multi-Object-Tracker., , , , and . ISCAS, page 853-856. IEEE, (2011)A self adaptive interfacing concept for consumer device integration into automotive entities., , , , and . IPDPS, page 1-6. IEEE, (2008)Communication Architectures for Dynamically Reconfigurable FPGA Designs., , , , , and . IPDPS, page 1-8. IEEE, (2007)High-Level Synthesis of HW Tasks Targeting Run-Time Reconfigurable FPGAs., , , , and . IPDPS, page 1-8. IEEE, (2007)A General Purpose Partially Reconfigurable Processor Simulator (PReProS)., , , and . IPDPS, page 1-7. IEEE, (2007)An FPGA Run-Time System for Dynamical On-Demand Reconfiguration., , , and . IPDPS, IEEE Computer Society, (2004)Run-Time FPGA Reconfiguration for Power-/Cost-Optimized Real-time Systems., , and . VLSI-SoC (Selected Papers), volume 200 of IFIP, page 119-132. Springer, (2003)Parallelization and virtualization of genetic algorithms for sorting permutations by reversals., , , and . NaBIC, page 29-35. IEEE, (2013)