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StageNet: A Reconfigurable Fabric for Constructing Dependable CMPs., , , and . IEEE Trans. Computers, 60 (1): 5-19 (2011)Uncovering hidden loop level parallelism in sequential applications., , , and . HPCA, page 290-301. IEEE Computer Society, (2008)Mobile Supercomputers for the Next-Generation Cell Phone., , , and . IEEE Computer, 43 (1): 81-85 (2010)Using Graphics Processing Units in an LTE Base Station., , , , , , , and . Signal Processing Systems, 78 (1): 35-47 (2015)Gadara: Dynamic Deadlock Avoidance for Multithreaded Programs., , , , and . OSDI, page 281-294. USENIX Association, (2008)The Effect of Compiler Optimizations on Available Parallelism in Scalar Programs., , , , and . ICPP (2), page 142-145. CRC Press, (1991)Tolerating First Level Memory Access Latency in High-Performance Systems., , and . ICPP (1), page 36-43. CRC Press, (1992)Power-efficient medical image processing using PUMA., , and . SASP, page 29-34. IEEE Computer Society, (2009)PEPSC: A Power-Efficient Processor for Scientific Computing., , , and . PACT, page 101-110. IEEE Computer Society, (2011)Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache., , , , , , and . CGO, page 179-190. IEEE Computer Society, (2005)