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Parallelized viterbi processor for 5, 000-word large-vocabulary real-time continuous speech recognition FPGA system.

T. Fujinaga, K. Miura, H. Noguchi, H. Kawaguchi, and M. Yoshimoto. INTERSPEECH, page 1483-1486. ISCA, (2009)

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Live demonstration: Intelligent ubiquitous sensor network for sound acquisition.K. Kugata, T. Takagi, H. Noguchi, M. Yoshimoto, and H. Kawaguchi. ISCAS, page 1413. IEEE, (2010)Fast and Low-Memory-Bandwidth Architecture of SIFT Descriptor Generation with Scalability on Speed and Accuracy for VGA Video.K. Mizuno, H. Noguchi, G. He, Y. Terachi, T. Kamino, H. Kawaguchi, and M. Yoshimoto. FPL, page 608-611. IEEE Computer Society, (2010)A Low-Power Real-Time SIFT Descriptor Generation Engine for Full-HDTV Video Recognition.K. Mizuno, H. Noguchi, G. He, Y. Terachi, T. Kamino, T. Fujinaga, S. Izumi, Y. Ariki, H. Kawaguchi, and M. Yoshimoto. IEICE Transactions, 94-C (4): 448-457 (2011)Data-Intensive Sound Acquisition System with Large-scale Microphone Array.H. Noguchi, T. Takagi, K. Kugata, S. Izumi, M. Yoshimoto, and H. Kawaguchi. JIP, (2011)A 10T Non-Precharge Two-Port SRAM for 74% Power Reduction in Video Processing.H. Noguchi, Y. Iguchi, H. Fujiwara, Y. Morita, K. Nii, H. Kawaguchi, and M. Yoshimoto. ISVLSI, page 107-112. IEEE Computer Society, (2007)A 40 nm 144 mW VLSI processor for realtime 60 kWord continuous speech recognition.G. He, T. Sugahara, T. Fujinaga, Y. Miyamoto, H. Noguchi, S. Izumi, H. Kawaguchi, and M. Yoshimoto. CICC, page 1-4. IEEE, (2011)A 40-nm 144-mW VLSI processor for real-time 60-kWord continuous speech recognition.G. He, T. Sugahara, T. Fujinaga, Y. Miyamoto, H. Noguchi, S. Izumi, H. Kawaguchi, and M. Yoshimoto. ASP-DAC, page 71-72. IEEE, (2013)Intelligent ubiquitous sensor network for sound acquisition.K. Kugata, T. Takagi, H. Noguchi, M. Yoshimoto, and H. Kawaguchi. ISCAS, page 1414-1417. IEEE, (2010)Highly reliable and low-power nonvolatile cache memory with advanced perpendicular STT-MRAM for high-performance CPU.H. Noguchi, K. Ikegami, N. Shimomura, T. Tanamoto, J. Ito, and S. Fujita. VLSIC, page 1-2. IEEE, (2014)A low memory bandwidth Gaussian mixture model (GMM) processor for 20, 000-word real-time speech recognition FPGA system.K. Miura, H. Noguchi, H. Kawaguchi, and M. Yoshimoto. FPT, page 341-344. IEEE, (2008)

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Parallelized viterbi processor for 5, 000-word large-vocabulary real-time continuous speech recognition FPGA system.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Parallelized viterbi processor for 5, 000-word large-vocabulary real-time continuous speech recognition FPGA system.

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Parallelized viterbi processor for 5, 000-word large-vocabulary real-time continuous speech recognition FPGA system.