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Disambiguation of "Kim, Jung Pill"

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An Offset-Canceling Triple-Stage Sensing Circuit for Deep Submicrometer STT-RAM.

, , , , and . IEEE Trans. VLSI Syst., 22 (7): 1620-1624 (2014)

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Mathias Jung University of Stuttgart

Kim Meliani University of Stuttgart

Joel Kimmich University of Stuttgart

Philipp Junger

Lukas Piller University of Stuttgart

 

Other publications of authors with the same name

A Double-Sensing-Margin Offset-Canceling Dual-Stage Sensing Circuit for Resistive Nonvolatile Memory., , , , and . IEEE Trans. on Circuits and Systems, 62-II (12): 1109-1113 (2015)Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter., , , , and . ICECS, page 400-403. IEEE, (2015)High-performance low-power magnetic tunnel junction based non-volatile flip-flop., , , , , and . ISCAS, page 1953-1956. IEEE, (2014)A Magnetic Tunnel Junction Based Zero Standby Leakage Current Retention Flip-Flop., , , , , and . IEEE Trans. VLSI Syst., 20 (11): 2044-2053 (2012)A Split-Path Sensing Circuit for Spin Torque Transfer MRAM., , , , and . IEEE Trans. on Circuits and Systems, 61-II (3): 193-197 (2014)Reference-Scheme Study and Novel Reference Scheme for Deep Submicrometer STT-RAM., , , , and . IEEE Trans. on Circuits and Systems, 61-I (12): 3376-3385 (2014)Latch Offset Cancellation Sense Amplifier for Deep Submicrometer STT-RAM., , , , , and . IEEE Trans. on Circuits and Systems, 62-I (7): 1776-1784 (2015)Reference-circuit analysis for high-bandwidth spin transfer torque random access memory., , , , and . ISLPED, page 365-370. IEEE, (2015)Read Disturbance Reduction Technique for Offset-Canceling Dual-Stage Sensing Circuits in Deep Submicrometer STT-RAM., , , and . IEEE Trans. on Circuits and Systems, 63-II (6): 578-582 (2016)Offset-Canceling Single-Ended Sensing Scheme With One-Bit-Line Precharge Architecture for Resistive Nonvolatile Memory in 65-nm CMOS., , , , , and . IEEE Trans. VLSI Syst., 27 (11): 2548-2555 (2019)