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Disambiguation of "Yoshimura, Takeshi"

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Mobility Overlap-Removal-Based Leakage Power and Register-Aware Scheduling in High-Level Synthesis.

, , , , and . IEICE Transactions, 97-A (8): 1709-1719 (2014)

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Other publications of authors with the same name

Lagrangian relaxation based register placement for high-performance circuits., , and . ISQED, page 511-516. IEEE Computer Society, (2009)Realizability of Score Sequence Pair of an (r1l, r12, r22)-Tournament., , and . APCCAS, page 1019-1022. IEEE, (2006)A rule-based and algorithmic approach for logic synthesis.. Future Generation Comp. Syst., 5 (1): 123-127 (1989)Streaming agent for wired network/wireless link rate-mismatch environment., , and . IEEE Workshop on Multimedia Signal Processing, page 388-391. IEEE, (2002)Do Injected Faults Cause Real Failures? A Case Study of Linux., , , and . ISSRE Workshops, page 174-179. IEEE Computer Society, (2014)An Engineering Change Orders Design Method Based on Patchwork-Like Partitioning for High Performance LSIs., , and . IEICE Transactions, 88-A (12): 3351-3357 (2005)A System Architecture for Managing Mobile Streaming Media Service., , , , and . ICDCS Workshops, page 408-413. IEEE Computer Society, (2003)Unified Parameter Decoder Architecture for H.265/HEVC Motion Vector and Boundary Strength Decoding., , , , and . IEICE Transactions, 98-A (7): 1356-1365 (2015)Max-Flow Scheduling in High-Level Synthesis., , , , and . IEICE Transactions, 90-A (9): 1940-1948 (2007)Leakage-Power-Aware Scheduling With Dual-Threshold Voltage Design., , , , , and . IEEE Trans. VLSI Syst., 24 (10): 3067-3079 (2016)