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Computational sprinting., , , , , , and . HPCA, page 249-260. IEEE Computer Society, (2012)Utilizing Dark Silicon to Save Energy with Computational Sprinting., , , , , , and . IEEE Micro, 33 (5): 20-28 (2013)Designing for Responsiveness with Computational Sprinting., , , , , , and . IEEE Micro, 33 (3): 8-15 (2013)Retiming and clock scheduling for digital circuit optimization., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 21 (2): 184-203 (2002)Performance Evaluation of Gang Scheduling for Parallel and Distributed Multiprogramming., , and . JSSPP, volume 1291 of Lecture Notes in Computer Science, page 277-298. Springer, (1997)Design of a high-throughput low-power IS95 Viterbi decoder., and . DAC, page 263-268. ACM, (2002)A True Single-Phase 8-bit Adiabatic Multiplier., , and . DAC, page 758-763. ACM, (2001)Parallelizing post-placement timing optimization., , and . IPDPS, IEEE, (2006)Resonant-Clock Design for a Power-Efficient, High-Volume x86-64 Microprocessor., , , , , and . J. Solid-State Circuits, 48 (1): 140-149 (2013)A 225 MHz resonant clocked ASIC chip., , , and . ISLPED, page 48-53. ACM, (2003)