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Disambiguation of "Komatsu, Yoshihide"

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A 125-1250 MHz Process-Independent Adaptive Bandwidth Spread Spectrum Clock Generator With Digital Controlled Self-Calibration.

, , , , , , , , , , and . J. Solid-State Circuits, 44 (3): 763-774 (2009)

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Other publications of authors with the same name

A 125-1250 MHz Process-Independent Adaptive Bandwidth Spread Spectrum Clock Generator With Digital Controlled Self-Calibration., , , , , , , , , and 1 other author(s). J. Solid-State Circuits, 44 (3): 763-774 (2009)A 0.25-27-Gb/s PAM4/NRZ Transceiver With Adaptive Power CDR and Jitter Analysis., , , , , , , , and . J. Solid-State Circuits, 54 (10): 2802-2811 (2019)Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond., , , , , , , , , and 4 other author(s). IEICE Transactions, 89-C (3): 250-262 (2006)An Ultra-Wide Range Bi-Directional Transceiver With Adaptive Power Control Using Background Replica VCO Gain Calibration., , , , , , and . J. Solid-State Circuits, 46 (4): 986-991 (2011)Transceiver Macro with Spread-Spectrum Clocking Capability for AC-Coupled Cable Interfaces., , , and . IEICE Transactions, 91-C (9): 1444-1452 (2008)Substrate-noise and random-fluctuations reduction with self-adjusted forward body bias., , , , , , and . CICC, page 35-38. IEEE, (2005)Substrate-Noise and Random-Variability Reduction with Self-Adjusted Forward Body Bias., , and . IEICE Transactions, 90-C (4): 692-698 (2007)A 0.25-27Gb/s Wideband PAM4/NRZ Transceiver with Adaptive Power CDR for 8K System., , , , , , , and . A-SSCC, page 63-66. IEEE, (2018)Soft Error Hardened Latch Scheme with Forward Body Bias in a 90-nm Technology and Beyond., , and . IEICE Transactions, 89-C (3): 384-391 (2006)