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Still Image Processing on Coarse-Grained Reconfigurable Array Architectures.

, , , , and . Signal Processing Systems, 60 (2): 225-237 (2010)

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Power Estimation at Different Abstraction Levels for Wireless Baseband Processors., , , , and . J. Low Power Electronics, 8 (5): 726-738 (2012)High level analysis of trade-offs across different partitioning schemes for wireless applications., , , , , , and . SiPS, page 156-162. IEEE, (2011)Instruction Transfer And Storage Exploration for Low Energy VLIWs., , , , and . SiPS, page 292-297. IEEE, (2006)Reviewing Data Access Patterns and Computational Redundancy for Machine Learning Algorithms., , and . CoRR, (2019)Instruction Buffering Exploration for Low Energy Embedded Processors., , , , , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 409-419. Springer, (2003)Low Power Coarse-Grained Reconfigurable Instruction Set Processor., , , , , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 230-239. Springer, (2003)Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor., , , and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 449-457. Springer, (2008)High-Throughput, Low-Power Software-Defined Radio Using Reconfigurable Processors., , , , , , , , and . IEEE Micro, 31 (6): 19-28 (2011)Still Image Processing on Coarse-Grained Reconfigurable Array Architectures., , , , and . Signal Processing Systems, 60 (2): 225-237 (2010)An Efficient Memory Organization for High-ILP Inner Modem Baseband SDR Processors., , , , , , and . Signal Processing Systems, 61 (2): 157-179 (2010)