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Simulation Trace Verification for Quantitative Constraints.

, , , and . Embedded Software for SoC, Kluwer / Springer, (2003)

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System Synthesis for Networks of Programmable Blocks, , , and . CoRR, (2007)Verification Approach of Metropolis Design Framework for Embedded Systems., , and . International Journal of Parallel Programming, 34 (1): 3-27 (2006)Runtime Deadlock Analysis of SystemC Designs., , , , and . HLDVT, page 187-194. IEEE Computer Society, (2006)Assertion-based power/performance analysis of network processor architectures., , , , , and . HLDVT, page 155-160. IEEE Computer Society, (2004)Memory subsystem simulation in software TLM/T models., , and . ASP-DAC, page 811-816. IEEE, (2009)eBlocks - an enabling technology for basic sensor based systems., , , and . IPSN, page 422-427. IEEE, (2005)Hardware-software codesign of embedded systems., , , , , and . IEEE Micro, 14 (4): 26-36 (1994)Assertion Based Verification and Analysis of Network Processor Architectures., , , , and . Design Autom. for Emb. Sys., 9 (3): 163-176 (2004)First results with eBlocks: embedded systems building blocks., , , and . CODES+ISSS, page 168-175. ACM, (2003)A case study in computer-aided codesign of embedded controllers., , , , , , , and . CODES, page 220-224. IEEE Computer Society, (1994)