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A SIMD-efficient 14 instruction shader program for high-throughput microtriangle rasterization., , , , , , and . The Visual Computer, 26 (6-8): 707-719 (2010)Loop Transformation Using Nonunimodular Matrices., , and . IEEE Trans. Parallel Distrib. Syst., 6 (8): 832-840 (1995)A Cost-Effective Implementation of Multilevel Tiling., , and . IEEE Trans. Parallel Distrib. Syst., 14 (10): 1006-1020 (2003)ATTILA: a cycle-level execution-driven simulator for modern GPU architectures., , , , and . ISPASS, page 231-241. IEEE Computer Society, (2006)Shader Performance Analysis on a Modern GPU Architecture., , , , and . MICRO, page 355-364. IEEE Computer Society, (2005)In-flight reconfigurable FPGA-based space systems., , , and . AHS, page 1-8. IEEE, (2015)Register tiling in nonrectangular iteration spaces., , and . ACM Trans. Program. Lang. Syst., 24 (4): 409-453 (2002)Interleaving Partitions of Systolic Algorithms for Programming Distributed Memory Multiprocessors., , , and . EDMCC, volume 487 of Lecture Notes in Computer Science, page 90-99. Springer, (1991)Loop bounds computation for multilevel tiling., , and . PDP, page 445-452. IEEE Computer Society, (1998)On the Performance of Hand vs. Automatically Optimized Numerical Codes., , and . HPCA, page 183-194. IEEE Computer Society, (2000)