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A DC-to-1 GHz Tunable RF Delta Sigma ADC Achieving DR = 74 dB and BW = 150 MHz at f0 = 450 MHz Using 550 mW.

H. Shibata, R. Schreier, W. Yang, A. Shaikh, D. Paterson, T. Caldwell, D. Alldred, and P. Lai. J. Solid-State Circuits, 47 (12): 2888-2897 (2012)

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A DC-to-1GHz tunable RF ΔΣ ADC achieving DR = 74dB and BW = 150MHz at f0 = 450MHz using 550mW.H. Shibata, R. Schreier, W. Yang, A. Shaikh, D. Paterson, T. Caldwell, D. Alldred, and P. Lai. ISSCC, page 150-152. IEEE, (2012)Advances in high-speed continuous-time delta-sigma modulators.T. Caldwell, D. Alldred, R. Schreier, H. Shibata, and Y. Dong. CICC, page 1-8. IEEE, (2014)Controllable decoding for automated analog circuit structure design.H. Shibata, A. Stoica, and N. Fujii. Soft Comput., 8 (5): 344-353 (2004)Maintenance of location-dependent views in mobile database environments.A. Nakaaki, H. Shibata, T. Murase, M. Tsukamoto, and S. Nishio. Systems and Computers in Japan, 31 (11): 70-81 (2000)A 72 dB-DR 465 MHz-BW Continuous-Time 1-2 MASH ADC in 28 nm CMOS.Y. Dong, J. Zhao, W. Yang, T. Caldwell, H. Shibata, Z. Li, R. Schreier, Q. Meng, J. Silva, D. Paterson and 1 other author(s). J. Solid-State Circuits, 51 (12): 2917-2927 (2016)A 100mW 10MHz-BW CT ΔΣ Modulator with 87dB DR and 91dBc IMD.W. Yang, W. Schofield, H. Shibata, S. Korrapati, A. Shaikh, N. Abaskharoun, and D. Ribner. ISSCC, page 498-499. IEEE, (2008)Measurement System for Switching Current Distribution in Intrinsic Josephson Junctions.H. Kashiwaya, T. Matsumoto, H. Shibata, K. Tani, and S. Kashiwaya. IEICE Transactions, 90-C (3): 605-606 (2007)15.5 A 930mW 69dB-DR 465MHz-BW CT 1-2 MASH ADC in 28nm CMOS.Y. Dong, J. Zhao, W. Yang, T. Caldwell, H. Shibata, R. Schreier, Q. Meng, J. Silva, D. Paterson, and J. Gealow. ISSCC, page 278-279. IEEE, (2016)A -89-dBc IMD3 DAC Sub-System in a 465-MHz BW CT Delta-Sigma ADC Using a Power and Area Efficient Calibration Technique.J. Zhao, Y. Dong, W. Yang, H. Shibata, P. Shrestha, Z. Li, T. Caldwell, J. Silva, and J. Gealow. IEEE Trans. on Circuits and Systems, 65-II (7): 859-863 (2018)A Digital Filtering ADC With Programmable Blocker Cancellation for Wireless Receivers.Q. Wang, H. Shibata, A. Liscidini, and A. Carusone. J. Solid-State Circuits, 53 (3): 681-691 (2018)

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A DC-to-1 GHz Tunable RF Delta Sigma ADC Achieving DR = 74 dB and BW = 150 MHz at f0 = 450 MHz Using 550 mW.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A DC-to-1 GHz Tunable RF Delta Sigma ADC Achieving DR = 74 dB and BW = 150 MHz at f0 = 450 MHz Using 550 mW.

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A DC-to-1 GHz Tunable RF Delta Sigma ADC Achieving DR = 74 dB and BW = 150 MHz at f0 = 450 MHz Using 550 mW.