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An error estimation technique for lowpass and bandpass ΣΔ ADC feedback DACs using a residual test signal.

, , , , and . ISCAS, page 73-76. IEEE, (2012)

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Calculating transfer functions of CT sigma-delta modulators with arbitrary DAC waveforms., , , , , and . ISCAS, page 1264-1267. IEEE, (2013)Peaking reduced STF design for CT ΣΔ modulators with selective pole compensation., , , , and . ISCAS, page 3134-3137. IEEE, (2012)Performance tuning of multi-bit continuous time ΣΔ-modulators using a switched system model., , , and . ICECS, page 420-423. IEEE, (2012)Discrete-time simulation of arbitrary digital/analog converter waveforms in continuous-time sigma-delta modulators., , , , and . ICECS, page 432-435. IEEE, (2012)A novel optimization method for CT sigma-delta-modulators using a switched system model., , , , and . ISCAS, page 1848-1851. IEEE, (2011)STF optimization of 1-bit CT ΣΔ modulators based on scaled loop filter coefficients., , , , and . ECCTD, page 266-269. IEEE, (2011)Discrete-time simulation of continuous-time ΣΔ modulators with arbitrary input signals., , , , , , and . ICECS, page 549-552. IEEE, (2013)Concurrent estimation of amplifier nonidealities and excess loop delay in continuous-time sigma-delta modulators., , , and . ISCAS, page 1031-1034. IEEE, (2013)State space analysis of mixed signal systems with switched feedback and delay., , , , and . ECCTD, page 1-4. IEEE, (2013)Hardware-Accelerated Simulation Environment for CT Sigma-Delta Modulators Using an FPGA., , , , , and . IEEE Trans. on Circuits and Systems, 59-II (8): 471-475 (2012)