Author of the publication

A Parallel Evolutionary Approach to Spatial Partitioning in Reconfigurable Environments.

, , , , , and . IICAI, page 938-951. IICAI, (2003)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Controllability-Driven Peak Dynamic Power Estimation for VLSI Circuits., , , and . J. Low Power Electronics, 3 (3): 280-292 (2007)ReMap: A Novel Automated Peephole Optimization Based Approach for Logic, Delay and Power Minimization., and . J. Low Power Electronics, 10 (1): 20-31 (2014)Best is the Enemy of Good: Design Techniques for Low Power Tunable Approximate Application Specific Integrated Chips Targeting Media-Based Applications., , , and . J. Low Power Electronics, 11 (2): 133-148 (2015)A novel approach to the placement and routing problems for field programmable gate arrays., , , and . Appl. Soft Comput., 7 (1): 455-470 (2007)A Simulation Based Buffer Sizing Algorithm for Network on Chips., , , , , and . ISVLSI, page 206-211. IEEE Computer Society, (2011)Sparse Dominance Queries for Many Points in Optimal Time and Space., and . Inf. Process. Lett., 64 (6): 287-291 (1997)Efficient Algorithms for Prefix and General Prefix Computations on Distributed Shared Memory Systems with Applications., and . ICPADS, page 44-51. IEEE Computer Society, (1997)SHAKTI Processors: An Open-Source Hardware Initiative., , , , and . VLSI Design, page 7-8. IEEE Computer Society, (2016)Adaptive finite element analysis on a parallel and distributed environment., , and . Parallel Computing, 25 (12): 1413-1434 (1999)Variation-Tolerant, Power-Safe Pattern Generation., , and . IEEE Design & Test of Computers, 24 (4): 374-384 (2007)