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A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs., , , , and . Microelectronics Reliability, 53 (9-11): 1189-1193 (2013)A novel analytical method for defect tolerance assessment., , and . Microelectronics Reliability, 55 (9-10): 1285-1289 (2015)A new fault-tolerant architecture for CLBs in SRAM-based FPGAs., , and . ICECS, page 761-764. IEEE, (2012)Comparison of fault-tolerant fabless CLBs in SRAM-based FPGAs., , and . LATW, page 1-6. IEEE Computer Society, (2013)Cross logic: A new approach for defect-tolerant circuits., , and . ICICDT, page 1-4. IEEE, (2014)A defect-tolerant multiplexer using differential logic for FPGAs., , and . MIXDES, page 375-380. IEEE, (2014)Improving the robustness of a switch box in a mesh of clusters FPGA., , and . LATW, page 1-6. IEEE, (2014)Comparative study of defect-tolerant multiplexers for FPGAs., , and . IOLTS, page 7-12. IEEE, (2014)Stochastic computation with Spin Torque Transfer Magnetic Tunnel Junction., , , , and . NEWCAS, page 1-4. IEEE, (2015)SNaP: A novel hybrid method for circuit reliability assessment under multiple faults., , , and . Microelectronics Reliability, 53 (9-11): 1230-1234 (2013)