Author of the publication

Flip-Flops for Accurate Multiphase Clocking: Transmission Gate Versus Current Mode Logic.

, , , , , and . IEEE Trans. on Circuits and Systems, 60-II (7): 422-426 (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Discrete-Time Mixing Receiver Architecture with Wideband Harmonic Rejection., , and . ISSCC, page 322-323. IEEE, (2008)A 400-to-900 MHz receiver with dual-domain harmonic rejection exploiting adaptive interference cancellation., , , and . ISSCC, page 232-233. IEEE, (2009)A 300-800 MHz Tunable Filter and Linearized LNA Applied in a Low-Noise Harmonic-Rejection RF-Sampling Receiver., , , and . J. Solid-State Circuits, 45 (5): 967-978 (2010)Digitally Enhanced Software-Defined Radio Receiver Robust to Out-of-Band Interference., , , and . J. Solid-State Circuits, 44 (12): 3359-3375 (2009)Jitter-Power minimization of digital frequency synthesis architectures., , , , and . ISCAS, page 165-168. IEEE, (2011)Flip-Flops for Accurate Multiphase Clocking: Transmission Gate Versus Current Mode Logic., , , , , and . IEEE Trans. on Circuits and Systems, 60-II (7): 422-426 (2013)Discrete-Time Mixing Receiver Architecture for RF-Sampling Software-Defined Radio., , and . J. Solid-State Circuits, 45 (9): 1732-1745 (2010)On the Suitability of Discrete-Time Receivers for Software-Defined Radio., , and . ISCAS, page 2522-2525. IEEE, (2007)A 23mW, 73dB dynamic range, 80MHz BW continuous-time delta-sigma modulator in 20nm CMOS., , , and . VLSIC, page 1-2. IEEE, (2014)Multipath Polyphase Circuits and their Application to RF Transceivers., , , , , and . ISCAS, page 273-276. IEEE, (2007)