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Disambiguation of "Braun, Lars"

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Intrinsic Identification of Xilinx Virtex-5 FPGA Devices Using Uninitialized Parts of Configuration Memory Space.

, , , , and . ReConFig, page 13-18. IEEE Computer Society, (2010)

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Lars Klingel University of Stuttgart

Lars Bippus University of Stuttgart

Dr. Lars Mautsch University of Stuttgart

Univ. -Prof. Dr. Manuel Braun University of Stuttgart

Carl-Jonas Braun University of Stuttgart

 

Other publications of authors with the same name

Methoden zur Erstellung eines laufzeitadaptiven und zweidimensional rekonfigurierbaren Systems.. Karlsruhe Institute of Technology, (2013)A FPGA based fast runtime reconfigurable real-time Multi-Object-Tracker., , , , and . ISCAS, page 853-856. IEEE, (2011)Fine grain reconfigurable architectures., , , , , , , , , and 5 other author(s). FPL, page 348. IEEE, (2008)Fast Sequential FPGA Startup Based on Partial and Dynamic Reconfiguration., , , , , , and . ISVLSI, page 190-194. IEEE Computer Society, (2010)Exploration of Uninitialized Configuration Memory Space for Intrinsic Identification of Xilinx Virtex-5 FPGA Devices., , , , and . Int. J. Reconfig. Comp., (2012)Adaptive real-time image processing exploiting two dimensional reconfigurable architecture., , , , , and . J. Real-Time Image Processing, 4 (2): 109-125 (2009)Adaptive Runtime System with Intelligent Allocation of Dynamically Reconfigurable Function Model and Optimized Interface Topologies., , , , , , and . Dynamically Reconfigurable Systems, Springer, (2010)Physical Configuration On-Line Visualization of Xilinx Virtex-II FPGAs., , , , and . ISVLSI, page 41-46. IEEE Computer Society, (2007)Run-time reconfigurable adaptive multilayer network-on-chip for FPGA-based systems., , , and . IPDPS, page 1-6. IEEE, (2008)FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing., , , , , and . ARC, volume 5453 of Lecture Notes in Computer Science, page 62-73. Springer, (2009)