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Disambiguation of "Flynn, Michael P."

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Rand PPM: A lowpower compressive sampling analog to digital converter.

, , , and . ICASSP, page 5980-5983. IEEE, (2011)

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Michael P. Voigt Universität Stuttgart

P. Hommel

P. Abegglen

P. Krasteva

P. E. Bl\"ochl

 

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A Flexible 500 MHz to 3.6 GHz Wireless Receiver with Configurable DT FIR and IIR Filter Embedded in a 7b 21 MS/s SAR ADC., , , and . IEEE Trans. on Circuits and Systems, 59-I (12): 2846-2857 (2012)EP2: You're hired! The top 25 interview questions for circuit designers., and . ISSCC, page 516. IEEE, (2013)A 28.5-33.5GHz fractional-N PLL using a 3rd order noise shaping time-to-digital converter with 176fs resolution., , and . ESSCIRC, page 376-379. IEEE, (2015)ADC trends and impact on SAR ADC architecture and analysis., and . CICC, page 1-8. IEEE, (2015)Global signaling over lossy transmission lines., and . ICCAD, page 985-992. IEEE Computer Society, (2005)A 100 MS/s, 10.5 Bit, 2.46 mW Comparator-Less Pipeline ADC Using Self-Biased Ring Amplifiers., and . J. Solid-State Circuits, 50 (10): 2331-2341 (2015)A 64 Channel Programmable Closed-Loop Neurostimulator With 8 Channel Neural Amplifier and Logarithmic ADC., , , and . J. Solid-State Circuits, 45 (9): 1935-1945 (2010)New Associate Editor.. J. Solid-State Circuits, 48 (9): 1999 (2013)A wirelessly powered log-based closed-loop deep brain stimulation SoC with two-way wireless telemetry for treatment of neurological disorders., , , , , and . VLSIC, page 70-71. IEEE, (2012)Enabling closed-loop neural interface: A bi-directional interface circuit with stimulation artifact cancellation and cross-channel CM noise suppression., , , , , and . VLSIC, page 108-. IEEE, (2015)