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EECache: exploiting design choices in energy-efficient last-level caches for chip multiprocessors.

, , , , , , , and . ISLPED, page 303-306. ACM, (2014)

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On the Performance of the POSIX I/O Interface to PVFS., , , , , and . PDP, page 332-339. IEEE Computer Society, (2004)QoS aware dynamic time-slice tuning., , and . IISWC, page 84-85. IEEE Computer Society, (2014)Optimizing Address Code Generation for Array-Intensive DSP Applications., and . CGO, page 141-152. IEEE Computer Society, (2005)Use of Local Memory for Efficient Java Execution., , , , and . ICCD, page 468-476. IEEE Computer Society, (2001)Software-Directed Data Access Scheduling for Reducing Disk Energy Consumption., , and . ICDCS, page 596-605. IEEE Computer Society, (2012)Optimizing Data Layouts for Parallel Computation on Multicores., , , and . PACT, page 143-154. IEEE Computer Society, (2011)Compiler Algorithms for Optimizing Locality and Parallelism on Shared and Distributed Memory Machines., , and . IEEE PACT, page 236-. IEEE Computer Society, (1997)Reducing Power with Performance Constraints for Parallel Sparse Applications., , , and . IPDPS, IEEE Computer Society, (2005)Influence of Array Allocation Mechanisms on Memory System Energy., , , and . IPDPS, page 3. IEEE Computer Society, (2001)Managing power, performance and reliability trade-offs., , , and . IPDPS, page 1-5. IEEE, (2008)