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Disambiguation of "Simevski, Aleksandar"

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Platform for automated HW/SW co-verification, testing and simulation of microprocessors.

, , and . LATW, page 1-5. IEEE Computer Society, (2012)

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Aleksandar Arsenijevic University of Stuttgart

 

Other publications of authors with the same name

Automated integration of fault injection into the ASIC design flow., , and . DFTS, page 255-260. IEEE Computer Society, (2013)Investigating Core-Level N-Modular Redundancy in Multiprocessors., , and . MCSoC, page 175-180. IEEE, (2014)Architectural framework for dynamically adaptable multiprocessors regarding aging, fault tolerance, performance and power consumption.. Brandenburg University of Technology, Cottbus - Senftenberg, Germany, (2015)Platform for automated HW/SW co-verification, testing and simulation of microprocessors., , and . LATW, page 1-5. IEEE Computer Society, (2012)Theoretical Aspects of a Design Method for Programmable NMR Voters., and . CoRR, (2015)Increasing multiprocessor lifetime by Youngest-First Round-Robin core gating patterns., , and . AHS, page 233-239. IEEE, (2014)Master-Clone Placement with Individual Clock Tree Implementation - a Case on Physical Chip Design., , , , and . NORCAS, page 1-4. IEEE, (2018)Scalable design of a programmable NMR voter with inputs' state descriptor and self-checking capability., , , and . AHS, page 182-189. IEEE, (2012)Implementation of a real time unit for satellite applications., , , , , , and . DDECS, page 180-185. IEEE, (2016)Power/Area-Optimized Fault Tolerance for Safety Critical Applications., , , and . IOLTS, page 123-126. IEEE, (2018)