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A mixed-mode FPAA SoC for analog-enhanced signal processing., , , and . CICC, page 1-4. IEEE, (2012)Automated conversion of Simulink designs to analog hardware on an FPAA., , and . ISCAS, page 500-503. IEEE, (2008)A High-Level Simulink-Based Tool for FPAA Configuration., , and . IEEE Trans. VLSI Syst., 20 (1): 10-18 (2012)A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing., , , and . J. Solid-State Circuits, 47 (9): 2174-2184 (2012)RASP 2.8: A new generation of floating-gate based field programmable analog array., , , , , , , and . CICC, page 213-216. IEEE, (2008)Hardware and software infrastructure for a family of floating-gate based FPAAs., , , , , , , , and . ISCAS, page 2794-2797. IEEE, (2010)Vector matrix multiplier on field programmable analog array., , and . ICASSP, page 1522-1525. IEEE, (2010)Reducing offset errors in MITE systems by precise floating gate programming., , , and . ISCAS, page 1340-1343. IEEE, (2010)A MITE-Based Translinear FPAA., , and . IEEE Trans. VLSI Syst., 20 (1): 1-9 (2012)Low-Power Discrete Fourier Transform for OFDM: A Programmable Analog Approach., , , , and . IEEE Trans. on Circuits and Systems, 58-I (2): 290-298 (2011)