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Modeling Synaptic Plasticity within Networks of Highly Accelerated I&F Neurons.

, , , and . ISCAS, page 3367-3370. IEEE, (2007)

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An analog dynamic memory array for neuromorphic hardware., , , and . ECCTD, page 1-4. IEEE, (2013)Spike-Frequency Adapting Neural Ensembles: Beyond Mean Adaptation and Renewal Theories., , , and . Neural Computation, 19 (11): 2958-3010 (2007)Control of criticality and computation in spiking neuromorphic networks with plasticity., , , , , and . CoRR, (2019)A Cmos Fpta Chip For Intrinsic Hardware Evolution Of Analog Electronic Circuits., , , , and . Evolvable Hardware, page 172-175. IEEE Computer Society, (2001)Realizing biological spiking network models in a configurable wafer-scale hardware system., , and . IJCNN, page 969-976. IEEE, (2008)Wafer-scale integration of analog neural networks., , and . IJCNN, page 431-438. IEEE, (2008)On the Evolution of Analog Electronic Circuits Using Building Blocks on a CMOS FPTA., , , , and . GECCO (1), volume 3102 of Lecture Notes in Computer Science, page 1316-1327. Springer, (2004)Entwicklung einer Kamera mit adaptiven Photorezeptoren in analoger CMOS-Technologie., , and . DAGM-Symposium, page 301-312. Springer, (1996)Versatile emulation of spiking neural networks on an accelerated neuromorphic substrate., , , , , , , , , and 15 other author(s). CoRR, (2019)The BrainScaleS-2 accelerated neuromorphic system with hybrid plasticity., , , , , , , , , and . CoRR, (2022)