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Chip-level and multi-node analysis of energy-optimized lattice Boltzmann CFD simulations.

, , , , and . Concurrency and Computation: Practice and Experience, 28 (7): 2295-2315 (2016)

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Comparison of different propagation steps for lattice Boltzmann methods., , , and . Computers & Mathematics with Applications, 65 (6): 924-935 (2013)An analysis of energy-optimized lattice-Boltzmann CFD simulations from the chip to the highly parallel level, , , and . CoRR, (2013)Asynchronous Checkpointing by Dedicated Checkpoint Threads., , , and . EuroMPI, volume 7490 of Lecture Notes in Computer Science, page 289-290. Springer, (2012)Multicore-aware parallel temporal blocking of stencil codes for shared and distributed memory., , and . IPDPS Workshops, page 1-7. IEEE, (2010)Chip-level and multi-node analysis of energy-optimized lattice Boltzmann CFD simulations., , , , and . Concurrency and Computation: Practice and Experience, 28 (7): 2295-2315 (2016)Domain decomposition and locality optimization for large-scale lattice Boltzmann simulations, , , and . CoRR, (2011)Extreme Scale-out SuperMUC Phase 2 - lessons learned., , , , , , , , , and 29 other author(s). CoRR, (2016)Comparison of different Propagation Steps for the Lattice Boltzmann Method, , , and . CoRR, (2011)Optimizing ccNUMA locality for task-parallel execution under OpenMP and TBB on multicore-based systems, and . CoRR, (2011)A two-scale approach for efficient on-the-fly operator assembly in massively parallel high performance multigrid codes., , , , , and . CoRR, (2016)