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Disambiguation of "Moon, Un-Ku"

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Class A+ amplifier with controlled positive feedback for discrete-time signal processing circuits.

, , , and . ISCAS, page 428-431. IEEE, (2012)

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Ilter Ünal University of Stuttgart

Stefanie Ungar University of Stuttgart

Sebastian David Unic University of Stuttgart

Hon. -Prof. Dr. Albrecht Ungerer University of Stuttgart

Christina Ungerer University of Stuttgart

 

Other publications of authors with the same name

A 2.5-V 10-b 120-MSample/s CMOS pipelined ADC based on merged-capacitor switching., , , and . IEEE Trans. on Circuits and Systems, 51-II (5): 269-275 (2004)Continuous-time filter design optimized for reduced die area., , , and . IEEE Trans. on Circuits and Systems, 51-II (3): 105-110 (2004)The Analysis and Application of Redundant Multistage ADC Resolution Improvements Through PDF Residue Shaping., , and . IEEE Trans. on Circuits and Systems, 59-I (8): 1733-1742 (2012)Domino-Logic-Based ADC for Digital Synthesis., , , and . IEEE Trans. on Circuits and Systems, 58-II (11): 744-747 (2011)Ring amplifiers for switched-capacitor circuits., , , , , and . ISSCC, page 460-462. IEEE, (2012)Class A+ amplifier with controlled positive feedback for discrete-time signal processing circuits., , , and . ISCAS, page 428-431. IEEE, (2012)Correlated jitter sampling for jitter cancellation in pipelined TDC., , , and . ISCAS, page 810-813. IEEE, (2012)Analysis of back-end flash in a 1.5b/stage pipelined ADC., , and . ISCAS, page 2247-2250. IEEE, (2013)Sensitivity Analysis for Oscillators., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (9): 1521-1534 (2008)Design of a 79 dB 80 MHz 8X-OSR Hybrid Delta-Sigma/Pipelined ADC., , , , , , and . J. Solid-State Circuits, 45 (4): 719-730 (2010)