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Exploring the performance of split data cache schemes on superscalar processors and symmetric multiprocessors.

, , , and . Journal of Systems Architecture, 51 (8): 451-469 (2005)

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A Scheduling Heuristic to Handle Local and Remote Memory in Cluster Computers., , , , and . HPCC, page 35-42. IEEE, (2010)Exploring the performance of split data cache schemes on superscalar processors and symmetric multiprocessors., , , and . Journal of Systems Architecture, 51 (8): 451-469 (2005)Balancing Task Resource Requirements in Embedded Multithreaded Multicore Processors to Reduce Power Consumption., , , , and . PDP, page 200-204. IEEE Computer Society, (2010)Current challenges in simulations of HPC systems.. HPCS, page 653-655. IEEE, (2015)Accurately modeling the GPU memory subsystem., , , and . HPCS, page 179-186. IEEE, (2015)Impact of Memory-Level Parallelism on the Performance of GPU Coherence Protocols., , , and . PDP, page 305-308. IEEE Computer Society, (2016)Spim-Cache: A Pedagogical Tool for Teaching Cache Memories Through Code-Based Exercises., , , and . IEEE Trans. Education, 50 (3): 244-250 (2007)A New Energy-Aware Dynamic Task Set Partitioning Algorithm for Soft and Hard Embedded Real-Time Systems., , , , and . Comput. J., 54 (8): 1282-1294 (2011)Using Huge Pages and Performance Counters to Determine the LLC Architecture., , , and . ICCS, volume 18 of Procedia Computer Science, page 2557-2560. Elsevier, (2013)Accurately modeling a photonic NoC in a detailed CMP simulation framework., , , , and . HPCS, page 387-394. IEEE, (2016)