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Characterizing the Benefits and Limitations of Smart Building Meeting Room Scheduling.

, , and . ICCPS, page 6:1-6:10. IEEE Computer Society, (2016)

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STATS: A framework for microprocessor and system-level design space exploration., and . Journal of Systems Architecture, 45 (12-13): 1097-1110 (1999)Guest Editors' Introduction: Power and Complexity Aware Design., , and . IEEE Micro, 23 (5): 8-11 (2003)Architecture and technology tradeoffs in the design of next-generation multiprocessor servers., and . SPDP, page 174-181. IEEE, (1995)Localized microarchitecture-level voltage management., and . ISCAS, IEEE, (2006)Flicker: a dynamically adaptive architecture for power limited multicore systems., , , and . ISCA, page 13-23. ACM, (2013)Hiding Synchronization Delays in a GALS Processor Microarchitecture., , , , , and . ASYNC, page 159-169. IEEE Computer Society, (2004)Dynamic frequency and voltage control for a multiple clock domain microarchitecture., , , , , and . MICRO, page 356-367. ACM/IEEE Computer Society, (2002)Energy-aware meeting scheduling algorithms for smart buildings., , and . BuildSys@SenSys, page 161-168. ACM, (2012)A microarchitectural-level step-power analysis tool., , and . ISLPED, page 263-266. ACM, (2002)An Evaluation of a Configurable Vliw Microarchitecture for Embedded Dsp Applications., , , , , , and . Journal of Circuits, Systems, and Computers, 13 (6): 1321-1346 (2004)