PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Jess, Jochen A. G."

Author of the publication

copydeleteadd this publication to your clipboard
On CMOS bridge fault modeling and test pattern evaluation.

, and . VTS, page 116-119. IEEE Computer Society, (1993)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

G. Daiß

A. Laukemann

G. Wagner

Dr. Jochen Seidel University of Stuttgart

Univ. -Prof. Dr. -Ing. Johann Jessen University of Stuttgart

 

Other publications of authors with the same name

Constraint analysis for DSP code generation., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 18 (1): 44-57 (1999)General gate array routing using a k-terminal net routing algorithm with failure prediction., and . IEEE Trans. VLSI Syst., 1 (4): 473-481 (1993)Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (11): 2376-2392 (2006)Technology mapping for standard-cell generators., and . ICCAD, page 470-473. IEEE Computer Society, (1988)On Accurate Modeling and Efficient Simulation of CMOS Opens., and . ITC, page 875-882. IEEE Computer Society, (1993)Run-time consistency checking in discrete simulation models., , and . ED&TC, page 223-227. IEEE Computer Society, (1995)Phase coupled operation assignment for VLIW processors with distributed register files., , and . ISSS, page 118-123. ACM / IEEE Computer Society, (2001)Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores., , , and . DAC, page 593-598. ACM Press, (1995)Statistical timing for parametric yield prediction of digital integrated circuits., , , , and . DAC, page 932-937. ACM, (2003)Codeübersetzung unter Zeitvorgaben für eingebettete Signalprozessoren (Performance Controlled Compilation for Embedded Signal Processors).. it - Information Technology, 45 (6): 327-335 (2003)