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Hardware Trojan Detection and Isolation Using Current Integration and Localized Current Analysis.

, , , and . DFT, page 87-95. IEEE Computer Society, (2008)

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Layout-Aware Pattern Evaluation and Analysis for Power-Safe Application of Transition Delay Fault Patterns., , , , , and . J. Low Power Electronics, 8 (2): 248-258 (2012)Benchmarking of Hardware Trojans and Maliciously Affected Circuits., , , , , and . J. Hardware and Systems Security, 1 (1): 85-102 (2017)A layout-aware approach for improving localized switching to detect hardware Trojans in integrated circuits., , and . WIFS, page 1-6. IEEE, (2010)On design vulnerability analysis and trust benchmarks development., , and . ICCD, page 471-474. IEEE Computer Society, (2013)A Novel Technique for Improving Hardware Trojan Detection and Reducing Trojan Activation Time., , and . IEEE Trans. VLSI Syst., 20 (1): 112-125 (2012)Layout-Aware Switching Activity Localization to Enhance Hardware Trojan Detection., and . IEEE Trans. Information Forensics and Security, 7 (1): 76-87 (2012)Dynamic single and Dual Rail spin transfer torque look up tables with enhanced robustness under CMOS and MTJ process variations., , , and . ICCD, page 348-351. IEEE Computer Society, (2016)Hybrid STT-CMOS designs for reverse-engineering prevention., , , , and . DAC, page 88:1-88:6. ACM, (2016)Assessment of Message Missing Failures in CAN-based Systems., and . Parallel and Distributed Computing and Networks, page 387-392. IASTED/ACTA Press, (2005)Preventing design reverse engineering with reconfigurable spin transfer torque LUT gates., , , and . ISQED, page 242-247. IEEE, (2016)