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Layer assignment for multichip modules., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 9 (12): 1272-1277 (1990)Optimized test application timing for AC test., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 11 (11): 1439-1449 (1992)Floorplanning by Topological Constraint Reduction., and . ICCAD, page 106-109. IEEE Computer Society, (1990)Fast power loss calculation for digital static CMOS circuits., , , , , and . ED&TC, page 411-415. IEEE Computer Society, (1997)On an edge ranking problem of trees and graphs., , and . Discrete Applied Mathematics, 30 (1): 43-52 (1991)VLSI Layout as Programming., , , , and . ACM Trans. Program. Lang. Syst., 5 (3): 405-421 (1983)Workload-Driven Floorplanning for MIPS Optimization., , , and . ICCD, page 387-391. IEEE Computer Society, (1992)Library-less synthesis for static CMOS combinational logic circuits., , , , , , , and . ICCAD, page 658-662. IEEE Computer Society / ACM, (1997)Min-cost Partitioning on a Tree Structure and Applications.. DAC, page 771-774. ACM Press, (1989)ALI: A procedural language to describe VLSI layouts., , , , and . DAC, page 467-474. ACM/IEEE, (1982)