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Overview of the Blue Gene/L system architecture., , , , , , , , , and 5 other author(s). IBM Journal of Research and Development, 49 (2-3): 195-212 (2005)Power and performance optimization at the system level., , , , , , , , , and 9 other author(s). Conf. Computing Frontiers, page 125-132. ACM, (2005)Blue Gene/L compute chip: Memory and Ethernet subsystem., , , , , , , , , and 3 other author(s). IBM Journal of Research and Development, 49 (2-3): 255-264 (2005)Blue Gene/L compute chip: Synthesis, timing, and physical design., , , , , , , , , and 2 other author(s). IBM Journal of Research and Development, 49 (2-3): 277-288 (2005)Blue Gene/L, a System-On-A-Chip., , , , , , , , , and 55 other author(s). CLUSTER, page 349-. IEEE Computer Society, (2002)An overview of the BlueGene/L Supercomputer., , , , , , , , , and 105 other author(s). SC, page 7:1-7:22. IEEE Computer Society, (2002)Blue Gene/L compute chip: Control, test, and bring-up infrastructure., , , , , , , , , and 2 other author(s). IBM Journal of Research and Development, 49 (2-3): 289-302 (2005)Blue Gene/L advanced diagnostics environment., , , , , , , , , and 5 other author(s). IBM Journal of Research and Development, 49 (2-3): 319-332 (2005)Data cache prefetching design space exploration for BlueGene/L supercomputer., , , , and . SBAC-PAD, page 201-208. IEEE Computer Society, (2005)The eDRAM based L3-Cache of the BlueGene/L Supercomputer Processor Node., , , and . SBAC-PAD, page 18-22. IEEE Computer Society, (2004)